Verification for Tomorrow’s SoCs: Building Confidence from IP to System The Purpose: Ensuring Real Confidence in Complex Systems Verification’s real purpose has never been about passing tests. It’s about building confidence-confidence that when an SoC boots for the first time, the hardware, firmware, and every handshake between IPs behave as intended. That purpose is now under […]

Agentic AI in IC Design: From Code Generation to True Engineering Autonomy In the last few years, the semiconductor world has seen AI everywhere – in layout optimization, verification analytics, yield modelling, and even chatbots that draft RTL. But most design engineers know the truth: those flashy demos rarely survive contact with a real toolchain. […]

Verifying Multi-Die Systems: The Hidden Challenge Behind the Chiplet Revolution In recent years, the semiconductor industry has started talking less about single giant chips and more about chiplets. The idea is simple in concept but revolutionary in impact – instead of building one massive die with every function squeezed in, you split the design into […]

When AI Becomes More Than a Tool: Our Emotional Dependence on Chatbots AI isn’t just a calculator anymore—it’s increasingly becoming a confidant, advisor, or even a “digital spouse,” according to OpenAI users. Explore why this emotional reliance matters now more than ever. 1.  Emotional Bonds Run Deep—Stronger Than Expected Many users were emotionally devastated after […]

Chiplet Architectures in AI Accelerators: Breaking the Monolith Abstract The rise of artificial intelligence has created an insatiable demand for compute, memory, and scale. But the monolithic system-on-chip (SoC) approach that powered decades of semiconductor growth is reaching its physical and economic limits. Reticle boundaries, yield challenges, and thermal constraints make it increasingly impractical to […]

AI Attachment & Emotional Dependence 1.  Altman Reflects on Emotional Attachments to AI Attachment stronger than past tech OpenAI CEO Sam Altman openly acknowledged that some users form unusually strong attachments to specific AI models. He noted this emotional bond is unlike anything seen with earlier technologies—and admitted that abruptly deprecating familiar models (e.g., GPT-4o) […]

UALink and the Battle for Rack-Scale GPU Interconnect Abstract Scaling AI workloads to tens of thousands of accelerators requires more than raw FLOPS — it requires the ability to connect GPUs into a coherent compute fabric. Nvidia has long dominated this domain with NVLink and NVSwitch, which provide high-bandwidth, low-latency interconnects tightly integrated into its […]

Ethernet Fabrics and the Rise of Open AI Networking Abstract Artificial intelligence has transformed datacenter architecture. The challenge today is not just how fast a single GPU can compute, but how efficiently tens of thousands of accelerators can work as one coherent, distributed system. For the past two decades, InfiniBand has dominated this role, offering […]

How Large Language Models Are Quietly Changing RTL Design? RTL design has always been one of the most crucial – and complex – steps in digital chip development. It’s where an engineer takes a specification and expresses it in hardware behaviour using languages like Verilog or System Verilog. As chips become more advanced – especially […]

Verifying AI Chips at RTL: How Foundation Models Are Transforming Design Assurance Modern AI chips are not general-purpose processors. Their RTL design logic is optimized not for instruction throughput, but for dataflow acceleration, parallel computation, and high-efficiency matrix operations. These chips integrate systolic arrays, sparsity-aware data paths, configurable tensor engines, and hierarchical memory systems. This […]